An Ultrawideband Low‐Voltage High‐Gain Up‐Conversion CMOS Mixer in CMOS 0.18‐μm Technology for 3–16 GHz

ABSTRACT This study presents a wideband up‐converter mixer with a frequency range of 3 to 16 GHz. The mixer is based on TSMC's 0.18‐μm CMOS technology. The architecture is based on a double‐balanced mixer. The transconductance stage uses an enhanced common source architecture to amplify the intermediate frequency signal, thereby increasing the conversion gain. In addition, the body effect is exploited to reduce the turn‐on voltage and DC power consumption of the transconductance stage. This design choice significantly reduces the power consumption of the mixer. The load inductor, a crucial component in the mixer's performance, uses a transformer‐coupling technique. This technique involves coupling the inductor with a transformer to increase its inductance without significantly increasing its physical size. This allows for better performance in a smaller area. The measured conversion gain is 12 to 14.47 dB from 3 to 16 GHz with a flat of ±1.23 dB. The LO‐to‐RF port isolation varies between 21 and 36 dB. The input intercept point of the third order (IIP3) is between −7.5 and −4.8 dBm. Total DC power consumption is 4 mW when operating at 0.8 V. The total chip size for the up‐conversion mixer is 1.09 × 1.2 mm 2 .

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Publication Details

Journal
International Journal of Circuit Theory and Applications
Published
2025-03-04
DOI
https://doi.org/10.1002/cta.4505
Citations
1
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.73
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article

An Ultrawideband Low‐Voltage High‐Gain Up‐Conversion CMOS Mixer in CMOS 0.18‐μm Technology for 3–16 GHz

Zhixiang Chen, Jun‐Da Chen
1 citations
International Journal of Circuit Theory and Applications
Radio Frequency Integrated Circuit Design
0.73
article

An Ultrawideband Low‐Voltage High‐Gain Up‐Conversion CMOS Mixer in CMOS 0.18‐μm Technology for 3–16 GHz

Zhixiang Chen, Jun‐Da Chen
article en
1 citations

Abstract

ABSTRACT This study presents a wideband up‐converter mixer with a frequency range of 3 to 16 GHz. The mixer is based on TSMC's 0.18‐μm CMOS technology. The architecture is based on a double‐balanced mixer. The transconductance stage uses an enhanced common source architecture to amplify the intermediate frequency signal, thereby increasing the conversion gain. In addition, the body effect is exploited to reduce the turn‐on voltage and DC power consumption of the transconductance stage. This design choice significantly reduces the power consumption of the mixer. The load inductor, a crucial component in the mixer's performance, uses a transformer‐coupling technique. This technique involves coupling the inductor with a transformer to increase its inductance without significantly increasing its physical size. This allows for better performance in a smaller area. The measured conversion gain is 12 to 14.47 dB from 3 to 16 GHz with a flat of ±1.23 dB. The LO‐to‐RF port isolation varies between 21 and 36 dB. The input intercept point of the third order (IIP3) is between −7.5 and −4.8 dBm. Total DC power consumption is 4 mW when operating at 0.8 V. The total chip size for the up‐conversion mixer is 1.09 × 1.2 mm 2 .

International Journal of Circuit Theory and ApplicationsVol. 53(10)
National Quemoy University (TW)
Openalex Percentile: Top 31%
Radio Frequency Integrated Circuit Design
0.73
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