Ge N‐Channel Ferroelectric FET Memory With Al₂O₃/AlN Interfacial Layer by Microwave Annealing

Abstract While n‐FeFET memory devices have shown promising characteristics for data storage and neuromorphic computing, implementing such devices with a Ge channel, which is expected to be adopted in advanced technology nodes, has never been reported due to the challenges in achieving desirable Ge interface quality. In this work, ferroelectric HfZrO x (HZO) is integrated with a high‐k Al 2 O 3 /AlN interfacial layer (IL), along with microwave annealing (MWA), to implement Ge n‐FeFET memory devices, and their memory and reliability characteristics, as well as their potential for neuromorphic applications, are extensively explored. A large memory window (MW) of 2.5 V is achieved by applying ±5 V for 5 µs while 3 bits/cell (triple‐level cell) operation is demonstrated. By using a recovery scheme, excellent 1‐bit/cell (single‐level cell) characteristics up to 10 8 cycles are also obtained. The proposed IL and low thermal budget of MWA alleviate element diffusion and reduce oxygen vacancies, marking the first demonstration of Ge n‐FeFET memory devices controlled by dipoles. Furthermore, short‐term synaptic plasticity, such as excitatory/inhibitory postsynaptic currents (EPSC/IPSC), which are essential for neuromorphic computing is also achieved. These findings suggest that Ge n‐FeFET memory devices could pave the way for high‐density embedded memory applications and could further be integrated with existing Ge p‐FeFET memory devices to form Ge‐based FeCMOS, enabling more versatile circuit functionalities.