Area-optimized and Reliable Computing-in-memory Platform Based on STT-MRAM

In the era of rapidly increasing data volume, complementary metal-oxide-semiconductor-based von Neumann structures have encountered several limitations, such as increased leakage current and data movement overhead. To solve this problem, computing-in-memory (CIM) that performs simple operations in memory has emerged. In this paper, we propose an area optimized CIM platform based on spin-transfer torque magnetic random access memory (STT-MRAM). Compared with previous CIM, the proposed CIM platform is area optimized by performing AND/OR logic functions using fewer reference word lines, and it uses an offset-canceling current-sampling sense amplifier to provide more reliable operation. Monte Carlo HSPICE simulation results based on industry-compatible 28-nm model parameters demonstrate the functionality and performance of the proposed CIM platform.