Interface-related VTH shift of SiC MOSFETs during constant current stress extracted from charge pumping measurements

This work focuses on the extraction of Threshold Voltage Shift due to interface trapping from Charge Pumping (CP) measured curves. The proposed mathematical approach analyzes the peak of the charge pumping curve, proportional to the average interface defects density, for estimating the threshold voltage shift due to interface trapping separately from the shift induced by oxide trapping. The high-frequency nature of CP measurements is therefore exploited for the detection of fast states. The analyzed devices are 4H-SiC n-channel MOSFETs and a custom, on-wafer, in-situ measurement setup is used. Under constant current gate stress, positive and negative charge trapping processes are identified; the role of a) charge trapping in the oxide and b) interface states generation is analyzed and described. • Analysis on SiC planar n-MOSFETs with NO PO anneal with custom on-wafer setup; • Constant current stress measured with Id-Vg and Charge Pumping measurements; • Stress shows electron trapping and hole generation and trapping; • Oxide charge-induced VthShift is estimated from ICP rising edge and Id-Vg curve; • Equation for interface charge-induced VthShift estimation from ICP peak is derived.