Chip Aging and Transition Faults With High Switching Activities Under Scan-Based Tests

Chip aging is a reliability concern that requires tests to be applied in-field. High workloads that translate into high switching activities during functional operation speed up the process of aging, and may result in defects. With in-field test periods varying in length, shorter in-field test periods should be used for targeting the faults that are more susceptible to aging. To identify such faults, the computation of the functional switching activities for the target faults requires the availability of functional sequences. This article targets the removal of this requirement. This is possible under the premise that the relative switching activities for target faults have a stronger dependence on circuit properties than on the patterns applied to it. Under this premise, the article investigates the possibility of replacing the functional switching activity with the switching activity obtained for a fault under a scan-based test set. Experimental results to demonstrate the accuracy of the new switching activity metric are presented for transition faults in benchmark circuits.