Design of Ultra-Low-Power Rail-to-Rail Input Common Mode Range Standard-Cell-Based Comparators

In this paper, a NOR2 standard-cell-based dynamic comparator providing rail-to-rail input common mode range (ICMR) is presented, together with a novel standard-cell oriented design methodology. The proposed topology provides better speed performance and lower power-delay-product than the previously presented standard-cell-based dynamic comparators with rail-to-rail ICMR features. The NOR2 topology, which is also better than the complementary NAND2-based topology previously presented by the authors, is even able to guarantee improvements in the order of 8× –16× higher speed and 7× lower PDP, with respect to the other rail-to-rail ICMR standard-cell-based topologies in the literature. Concerning the standard-cell oriented design methodology, it is focused on the impact of the cell’s strength, which is the only free parameter, on delay, power consumption, ICMR and offset. The circuit performances are demonstrated for supply voltages equal to 600 mV, 300 mV and 150 mV, considering a 45 nm CMOS technology.

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Publication Details

Journal
Journal of Low Power Electronics and Applications
Published
2025-03-08
DOI
https://doi.org/10.3390/jlpea15010014
Citations
3
Primary Topic
Electromagnetic Compatibility and Noise Suppression
Type
article
Field-Weighted Citation Impact
2.19
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article

Design of Ultra-Low-Power Rail-to-Rail Input Common Mode Range Standard-Cell-Based Comparators

Giuseppe Scotti, G. Palumbo, Antonio Manno
3 citations
Journal of Low Power Electronics and Applications
Electromagnetic Compatibility and Noise Suppression
2.19
article

Design of Ultra-Low-Power Rail-to-Rail Input Common Mode Range Standard-Cell-Based Comparators

Giuseppe Scotti, G. Palumbo, Antonio Manno
article en
3 citations

Abstract

In this paper, a NOR2 standard-cell-based dynamic comparator providing rail-to-rail input common mode range (ICMR) is presented, together with a novel standard-cell oriented design methodology. The proposed topology provides better speed performance and lower power-delay-product than the previously presented standard-cell-based dynamic comparators with rail-to-rail ICMR features. The NOR2 topology, which is also better than the complementary NAND2-based topology previously presented by the authors, is even able to guarantee improvements in the order of 8× –16× higher speed and 7× lower PDP, with respect to the other rail-to-rail ICMR standard-cell-based topologies in the literature. Concerning the standard-cell oriented design methodology, it is focused on the impact of the cell’s strength, which is the only free parameter, on delay, power consumption, ICMR and offset. The circuit performances are demonstrated for supply voltages equal to 600 mV, 300 mV and 150 mV, considering a 45 nm CMOS technology.

Journal of Low Power Electronics and ApplicationsVol. 15(1)
University of Catania (IT), Sapienza University of Rome (IT)
Openalex Percentile: Top 13%
Electromagnetic Compatibility and Noise Suppression
2.19
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