Fast Sensorless Voltage Balancing in PUC5 Inverter with phase-shift modulation

This paper proposes a novel sensorless phase-shift modulation-based voltage balancing technique for a 5-level Packed U-Cell (PUC5) inverter. Two phase-shifted triangular carriers are used to modulate the reference signal and generate the appropriate gate pulses. The switching pulse generation is specifically designed to charge and discharge the capacitor at the speed of switching frequency, resulting in a fast voltage balancing of the auxiliary capacitor. Compared with the reported level-shifted modulation method, the proposed technique simplifies comparators and logic gates while keeping the benefit of fast sensorless voltage balancing and, consequently, the capacitor size reduction. In other words, it modifies the reference signal to achieve the fast voltage balancing of the auxiliary capacitor in PUC5. Simulation results are shown to investigate the effectiveness of the proposed technique.

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Publication Details

Published
2024-11-03
DOI
https://doi.org/10.1109/iecon55916.2024.10905297
Primary Topic
Multilevel Inverters and Converters
Type
article
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Fast Sensorless Voltage Balancing in PUC5 Inverter with phase-shift modulation

Hani Vahedi, Pavol Bauer, Hangbiao Zhu, Azadeh Kermansaravi
Multilevel Inverters and Converters
article

Fast Sensorless Voltage Balancing in PUC5 Inverter with phase-shift modulation

Hani Vahedi, Pavol Bauer, Hangbiao Zhu, Azadeh Kermansaravi
article en

Abstract

This paper proposes a novel sensorless phase-shift modulation-based voltage balancing technique for a 5-level Packed U-Cell (PUC5) inverter. Two phase-shifted triangular carriers are used to modulate the reference signal and generate the appropriate gate pulses. The switching pulse generation is specifically designed to charge and discharge the capacitor at the speed of switching frequency, resulting in a fast voltage balancing of the auxiliary capacitor. Compared with the reported level-shifted modulation method, the proposed technique simplifies comparators and logic gates while keeping the benefit of fast sensorless voltage balancing and, consequently, the capacitor size reduction. In other words, it modifies the reference signal to achieve the fast voltage balancing of the auxiliary capacitor in PUC5. Simulation results are shown to investigate the effectiveness of the proposed technique.

Delft University of Technology (NL)
Affordable and clean energy
Openalex Percentile: Top 74%
Multilevel Inverters and Converters
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