DMM-ESH Technique for Real-time Simulation of Three-level NPC Dual Active Bridge Converter

This paper proposes a novel approach for real-time simulation of high switching frequency power converters. Our method innovatively combines the direct mapped method (DMM) with the conventional explicit status handling (ESH) technique to accurately and efficiently model power electronic converters. Applied to the three-level neutral point clamped (NPC) dual active bridge (DAB) converter, our approach achieves a significantly reduced time-step when implemented on field-programmable gate arrays (FPGAs) while accounting for the natural commutation of diodes. Furthermore, this research demonstrates the feasibility of implementing the proposed method on low-cost FPGA systems, achieving time-steps ranging from 32 ns to 50 ns for the three-level NPC DAB test case.

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Published
2024-11-03
DOI
https://doi.org/10.1109/iecon55916.2024.10905616
Primary Topic
Particle accelerators and beam dynamics
Type
article
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article

DMM-ESH Technique for Real-time Simulation of Three-level NPC Dual Active Bridge Converter

Romain Monthéard, Karim Meddah, Emmanuel Rutovic, Tarek Ould‐Bachir et al.
Particle accelerators and beam dynamics
article

DMM-ESH Technique for Real-time Simulation of Three-level NPC Dual Active Bridge Converter

Romain Monthéard, Karim Meddah, Emmanuel Rutovic, Tarek Ould‐Bachir, Zheng Yan, Téo Robert
article en

Abstract

This paper proposes a novel approach for real-time simulation of high switching frequency power converters. Our method innovatively combines the direct mapped method (DMM) with the conventional explicit status handling (ESH) technique to accurately and efficiently model power electronic converters. Applied to the three-level neutral point clamped (NPC) dual active bridge (DAB) converter, our approach achieves a significantly reduced time-step when implemented on field-programmable gate arrays (FPGAs) while accounting for the natural commutation of diodes. Furthermore, this research demonstrates the feasibility of implementing the proposed method on low-cost FPGA systems, achieving time-steps ranging from 32 ns to 50 ns for the three-level NPC DAB test case.

Commissariat à l'Énergie Atomique et aux Énergies Alternatives (FR), Polytechnique Montréal (CA)
Affordable and clean energy
Openalex Percentile: Top 53%
Particle accelerators and beam dynamics
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