Investigating Effects of Timescale Delays on the Ride-Through Capabilities of the Grid-Forming Inverter

The microgrid is a potential solution for implementing smart distributed systems. However, controlling a microgrid is still a complex issue, and many proposed solutions are only based on locally measured signals without any communications; thus, it is difficult to achieve global optimization in a droop control microgrid inverter. Hence, this paper deals with modeling and small signal analyzing the robust operation parameters of inverter-based microgrids with a concentration on the phase lock loop (PLL) and time delay stability within its controller logic. The objective of this paper is to provide a better understanding of ride-through fault capabilities of droop control Grid-Forming Inverter (GFM) tied into the generation side of the power grid during system disturbance. Furthermore, it investigates the robustness of implementing time delay with a PLL system within the control settings for grid-forming inverters. Also, it identifies the contributing factors that affect the stability of the time delay to better design future models of GFMs.