Partial Virtual Damping Impedance Method Interface Approach for Power Hardware-in-the-Loop Simulation

Power hardware-in-the-loop (PHIL) simulation is a technique whereby actual power hardware is interfaced to a virtual surrounding system, simulated in real-time, through PHIL interfaces making use of power amplifiers and/or actuators. A number of interface approaches (IA) have been proposed in the literature for achieving the virtual coupling between the simulated and physical portions of the system, with the damping impedance method (DIM) often cited and employed due to its high stability and accuracy in cases in which the damping impedance can be closely matched to the impedance of the hardware of interest (HOI). However, in many cases, including many applications with power electronic converters, the impedance of the HOI is not easily represented by a passive network, as the converter controls may arbitrarily shape the impedance characteristic within the controllable bandwidth of the power converter. In this paper, a variation of the DIM IA is proposed in which the damping impedance is represented virtually as a voltage drop with the stimulus source, allowing arbitrary transfer function characteristics to be represented for the damping impedance. A variant is also proposed in which part of the damping impedance is represented virtually, and part of the damping impedance is represented explicitly with a passive network. An analysis of these approaches is provided to show the potential benefits and limitations of these approaches, illustrating these through practical examples.