A dual-channel fully parallel shifting-based WVD architecture for real-time processing applications

The Wigner-Ville distribution (WVD) is a widely used time-frequency analysis (TFA) technique in non-stationary signal processing. However, as signal bandwidths increase, the low throughput of traditional serial architectures hinders real-time WVD processing. In this paper, we propose a novel dual-channel, fully parallel WVD architecture based on data shifting method. We comprehensively tap into the parallel potential in the WVD algorithm and present the corresponding data flow graph. By utilizing a symmetric dual-channel structure, we significantly streamline the generation and combination of autocorrelation sequences, while halving the total number of complex multiplications and FFTs. Additionally, we develop a memory-based, three-stage autocorrelation generator using a data-shifting technique, thereby obviating the necessity for address generation stages. Implementation results show that our design achieves a 95% latency reduction compared to the state-of-the-art WVD architectures, attaining a maximum clock frequency of 322 MHz on a Xilinx UltraScale+ FPGA. The proposed architecture holds substantial potential for augmenting the real-time processing of wide-band signals.

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Publication Details

Journal
IEICE Electronics Express
Published
2025-03-05
DOI
https://doi.org/10.1587/elex.22.20250079
Primary Topic
Power Line Communications and Noise
Type
article
Field-Weighted Citation Impact
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article

A dual-channel fully parallel shifting-based WVD architecture for real-time processing applications

Runsheng Wang, Shanzhu Xiao, Qiuqun Deng, Jianxiong Zhou et al.
IEICE Electronics Express
Power Line Communications and Noise
article

A dual-channel fully parallel shifting-based WVD architecture for real-time processing applications

Runsheng Wang, Shanzhu Xiao, Qiuqun Deng, Jianxiong Zhou, Huamin Tao
article en

Abstract

The Wigner-Ville distribution (WVD) is a widely used time-frequency analysis (TFA) technique in non-stationary signal processing. However, as signal bandwidths increase, the low throughput of traditional serial architectures hinders real-time WVD processing. In this paper, we propose a novel dual-channel, fully parallel WVD architecture based on data shifting method. We comprehensively tap into the parallel potential in the WVD algorithm and present the corresponding data flow graph. By utilizing a symmetric dual-channel structure, we significantly streamline the generation and combination of autocorrelation sequences, while halving the total number of complex multiplications and FFTs. Additionally, we develop a memory-based, three-stage autocorrelation generator using a data-shifting technique, thereby obviating the necessity for address generation stages. Implementation results show that our design achieves a 95% latency reduction compared to the state-of-the-art WVD architectures, attaining a maximum clock frequency of 322 MHz on a Xilinx UltraScale+ FPGA. The proposed architecture holds substantial potential for augmenting the real-time processing of wide-band signals.

IEICE Electronics ExpressVol. 22(8)
National University of Defense Technology (CN)
Affordable and clean energy
Openalex Percentile: Top 97%
Power Line Communications and Noise
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