A Non-Overlapping Synthetic Clock Generator for DC-DC Boost Converter in 65 nm CMOS Technology

Boost converters have been widely adopted in battery-powered technologies due to their compact size, afford-ability, and ability to generate a higher output voltage than the input voltage. Regulating the output voltage is crucial for these converters in portable devices, as these devices operate across a wide range of current loads, potentially affecting output voltage stability. Feedback loops in boost converters can effectively address this regulation issue. A key component in these feedback loops is the clock generator, which manages the switching activities of the boost converter. It controls the inductor's charging and discharging phases to produce the boosted output voltage. This paper introduces a non-overlapping synthetic clock generator for boost converters, designed to maintain an almost constant switching frequency for stable output voltage regulation across a wide load current range. This system is implemented using the TSMC 65nm CMOS technology process.