A high-efficiency modeling method for analog integrated circuits

Integrated circuits (ICs) are the foundation of information technology development. The optimal design scheme of analog IC is determined by iteratively running the simulation software and comparing the performance metrics. However, the simulation software of analog IC is time-consuming, which leads to the low design efficiency. Due to the non-ideal factors in analog ICs, the non-linear relationship between design parameters and performance metrics cannot be well described by the deduced approximation equations. Inspired by the image and semantic recognition, a universal high-efficiency modelling method for analog IC based on convolutional neural network (CNN) is proposed, named as CNN-IC. The sparse topology mapping method is proposed to map the design parameters into a sparse matrix, which includes the spatial and transistor characteristics of analog IC. The CNN model with three convolutional kernels is constructed to extract ‘transistor-circuit module-integrate circuit’ features level by level, which can replace the simulation softwares to effectively improve the training efficiency and accuracy. Two typical analog ICs are selected to verify the effectiveness of CNN-IC model. The results show that the accuracy of CNN-IC model is over 99%, and its convergence rate is the fastest compared with the machine learning models in the state of the art.