Instruction-Based High-Performance Hardware Controller of CRYSTALS-Kyber With Balanced Resource Utilization

Post-quantum cryptography (PQC) aims to ensure information security in the era following the emergence of quantum computers. Lattice-based cryptography (LBC) algorithms have shown significant promise in the standardization process of post-quantum cryptography. This paper proposes an instruction-based high-performance hardware controller of CRYSTALS-Kyber. By designing a highly flexible instruction-based architecture, the control unit evenly distributes instructions and enables independent control of internal modules, significantly enhancing the scalability and adaptability of the hardware. Additionally, the integration of a reconfigurable polynomial operation array (RPOA) unit and optimization of data storage formats further improve computational efficiency and resource utilization. Implementation results on Artix-7 FPGA show that the architecture operates at a frequency exceeding 300 MHz, achieving a performance improvement of 41.3% to 170% compared to the latest designs, while significantly reducing resource overhead. The resource costs for the three security levels are 8112 LUTs, 6077 FFs, and 2523 SLICEs, respectively, with overall computation times of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$34.7~\mu s$ </tex-math></inline-formula>, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$53.4~\mu s$ </tex-math></inline-formula>, and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$78.5~\mu s$ </tex-math></inline-formula>. The proposed design demonstrates outstanding performance, resource efficiency, and energy consumption, providing an efficient and cost-effective hardware solution for the practical deployment of post-quantum cryptography.

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Publication Details

Journal
IEEE Transactions on Circuits and Systems I Regular Papers
Published
2025-03-07
DOI
https://doi.org/10.1109/tcsi.2025.3547799
Citations
4
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
Field-Weighted Citation Impact
9.08

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article

Instruction-Based High-Performance Hardware Controller of CRYSTALS-Kyber With Balanced Resource Utilization

Zhuoyao Zhang, Yijun Cui, Weiqiang Liu, Chenghua Wang et al.
4 citations
IEEE Transactions on Circuits and Systems I Regular Papers
Parallel Computing and Optimization Techniques
9.08
article

Instruction-Based High-Performance Hardware Controller of CRYSTALS-Kyber With Balanced Resource Utilization

Zhuoyao Zhang, Yijun Cui, Weiqiang Liu, Chenghua Wang, Ziying Ni, Jiansheng Chen
article en
4 citations

Abstract

Post-quantum cryptography (PQC) aims to ensure information security in the era following the emergence of quantum computers. Lattice-based cryptography (LBC) algorithms have shown significant promise in the standardization process of post-quantum cryptography. This paper proposes an instruction-based high-performance hardware controller of CRYSTALS-Kyber. By designing a highly flexible instruction-based architecture, the control unit evenly distributes instructions and enables independent control of internal modules, significantly enhancing the scalability and adaptability of the hardware. Additionally, the integration of a reconfigurable polynomial operation array (RPOA) unit and optimization of data storage formats further improve computational efficiency and resource utilization. Implementation results on Artix-7 FPGA show that the architecture operates at a frequency exceeding 300 MHz, achieving a performance improvement of 41.3% to 170% compared to the latest designs, while significantly reducing resource overhead. The resource costs for the three security levels are 8112 LUTs, 6077 FFs, and 2523 SLICEs, respectively, with overall computation times of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$34.7~\mu s$ </tex-math></inline-formula>, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$53.4~\mu s$ </tex-math></inline-formula>, and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$78.5~\mu s$ </tex-math></inline-formula>. The proposed design demonstrates outstanding performance, resource efficiency, and energy consumption, providing an efficient and cost-effective hardware solution for the practical deployment of post-quantum cryptography.

IEEE Transactions on Circuits and Systems I Regular PapersVol. 72(5)
Queen's University Belfast (GB), Nanjing University of Aeronautics and Astronautics (CN)
National Natural Science Foundation of China
Openalex Percentile: Top 3%
Parallel Computing and Optimization Techniques
9.08
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