Bandwidth and Power Resilient BiLSTM Digital Predistorter with Reduced Obervation Bandwidth for 5G Applications

This paper proposes the use of bidirectional long-short term memory (BiLSTM) neural networks based digital predistortion for 5G applications. The proposed architecture uniquely combines two features that reduce the predistorter's update complexity. First, to accommodate the wideband nature of 5G signals, the proposed predistorter is identified from under-sampled feedback signals. This results in a significant reduction of the sampling rate required in the signal observation path. Furthermore, the proposed BiLSTM structure and its identification process make the synthesized predistortion function resilient to changes in the signal characteristics such as the average power, bandwidth and carriers configuration. Therefore, limiting the need for frequent update of the predistortion function. The proposed approach is validated experimentally on a GaN power amplifier prototype driven by 5G NR test signals. Experimental results demonstrate that the predistorter synthesized from a single characterization with a 30MHz test signal acquired at 46Msps is able to linearize the power amplifier over a 5dB range of operating average power, and different signal bandwidths with various carriers configurations.

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Publication Details

Published
2024-10-17
DOI
https://doi.org/10.1109/atc63255.2024.10908268
Citations
1
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.21
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article

Bandwidth and Power Resilient BiLSTM Digital Predistorter with Reduced Obervation Bandwidth for 5G Applications

Asma Ali, Oualid Hammi, Majid Ahmed
1 citations
Radio Frequency Integrated Circuit Design
0.21
article

Bandwidth and Power Resilient BiLSTM Digital Predistorter with Reduced Obervation Bandwidth for 5G Applications

Asma Ali, Oualid Hammi, Majid Ahmed
article en
1 citations

Abstract

This paper proposes the use of bidirectional long-short term memory (BiLSTM) neural networks based digital predistortion for 5G applications. The proposed architecture uniquely combines two features that reduce the predistorter's update complexity. First, to accommodate the wideband nature of 5G signals, the proposed predistorter is identified from under-sampled feedback signals. This results in a significant reduction of the sampling rate required in the signal observation path. Furthermore, the proposed BiLSTM structure and its identification process make the synthesized predistortion function resilient to changes in the signal characteristics such as the average power, bandwidth and carriers configuration. Therefore, limiting the need for frequent update of the predistortion function. The proposed approach is validated experimentally on a GaN power amplifier prototype driven by 5G NR test signals. Experimental results demonstrate that the predistorter synthesized from a single characterization with a 30MHz test signal acquired at 46Msps is able to linearize the power amplifier over a 5dB range of operating average power, and different signal bandwidths with various carriers configurations.

American University of Sharjah (AE)
Affordable and clean energy
Openalex Percentile: Top 43%
Radio Frequency Integrated Circuit Design
0.21
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Bandwidth and Power Resilient BiLSTM Digital Predistorter with Reduced Obervation Bandwidth for 5G Applications — Asma Ali, Oualid Hammi, et al. · (2024) | TGRS Research Map | TGRS