Implementation of Spiking Neural Network's Components on SKY130 CMOS Process

This paper presents the implementation of Spiking Neural Network (SNN) components on the SKY130 CMOS process, focusing on the integration of a neuromorphic neuron based on the Izhikevich spiking model and a synthetic synapse using a CMOS memristor emulator. The study explores the practical application of CMOS technology to mimic biological neural functions, emphasizing synaptic plasticity through Spike-Timing Dependent Plasticity (STDP) mechanisms. The proposed neuron is capable of generating 4 main categories of spiking patterns (RS, FS, IB, CH). The synapse provides clear observations of the pinched hysteresis loop and the state trajectory, which is a necessary assessment for a memristor emulator. In sum, the findings contribute to the development of more efficient, scalable, and biologically plausible neuromorphic systems.