Frame-Unit Operating Neuron Circuits for Hardware Recurrent Spiking Neural Networks

A frame-unit operating neuron circuit (f-NC) for hardware recurrent spiking neural networks (RSNNs) is proposed. The proposed f-NC enables the two essential features required in RSNNs, which have been challenging to implement in conventional integrate-and-fire (I&F) neuron-based systems: 1) the ability to recurrently feed the output from the previous state (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${t} -1$ </tex-math></inline-formula>) as input to the current state (t) in the frame unit, and 2) the implementation of a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\tanh $ </tex-math></inline-formula> activation function. System-level simulations of the Free Spoken Digits Dataset are performed to confirm the operation of RSNNs with f-NCs with charge-trap flash (CTF)-based <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">and</small>-type synaptic arrays, which store 16-state weights and operate array- and circuit-level vector-matrix multiplication (VMM). It shows 97.05% RSNN inference accuracy, including quantized synaptic weight and nonidealities in the activation function of the neuron circuit.