High-Throughput TRNG Design with Novelty Adjustable TDC Based on STR

In IoT devices, True Random Number Generators (TRNGs) play an increasingly important role, and advanced TRNGs must possess high throughput, low resource overhead, and high stability. In this article, we propose a fine-grained entropy extraction circuit based on Self-Timed Ring (STR), which can change the entropy extraction capability by varying the stages of STRs to extract randomness from different entropy sources. Importantly, the throughput of the proposed TRNG can be automatically adjusted according to the frequency of the entropy source, adapting to user requirements. The proposed TRNG is validated on Xilinx Spartan-6, Xilinx Artix-7, and Xilinx Virtex-6 FPGA development boards. It utilizes a three-stage Ring Oscillator (RO) and a five-stage RO for entropy extraction, requiring only 53 LUTs, 32 DFFs, and 62 registers. The generated random numbers of the TRNG, without any post-processing, achieve excellent results in NIST SP 800-22, NIST SP 800-90B, robustness test, universality test, AIS-31, and TEST U01, demonstrating a throughput of 280 Mbps.