FastFP: A Fast Floorplanner Using Adaptive Simulated Annealing Algorithm
To enhance the efficiency and optimization quality of simulated annealing-based floorplanning algorithms, existing approaches either improve one of the two components (global cooling schedule or local search process) or refine both separately using distinct improvement mechanisms. However, improving only one component limits the ability to fully exploit the potential of both, while enhancing them separately may not lead to a harmonious integration. To address these limitations, this paper proposes FastFP, a novel floorplanning algorithm that integrates the refinement of both the local search and cooling schedule into a unified framework. A metric based on the rejection-to-acceptance ratio is introduced, and adaptive cooling and local search strategies are developed upon it. Experimental results demonstrate that FastFP outperforms the baseline floorplanning algorithm in both area (or wirelength) optimization and time efficiency. Additionally, in co-optimizing area and wirelength, FastFP may sacrifice small gains in favor of a significantly larger reduction in time cost.
Authors
- Yangrui Huang (ORCID: https://orcid.org/0009-0000-5240-0135)
- Yan Xing (ORCID: https://orcid.org/0000-0001-7651-5287)
- Shuting Cai (ORCID: https://orcid.org/0000-0002-2842-6439)
- Xiaoming Xiong (ORCID: https://orcid.org/0000-0001-7536-232X)
- Weijun Li (ORCID: https://orcid.org/0000-0002-1227-0791)
Institutions
- Guangdong University of Technology (CN)
Publication Details
- Journal
- Journal of Circuits Systems and Computers
- Published
- 2025-03-06
- DOI
- https://doi.org/10.1142/s021812662550286x
- Primary Topic
- VLSI and FPGA Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00