Implementation of Highly Modular and Scalable Video Processing System Design Based on FPGA
Addressing the limitations of current video display solutions in terms of channel capacity, this article introduces a multi-channel independent video merging and real-time display system powered by Field Programmable Gate Array (FPGA). The highly modular system enables scalable channel expansion through subsystem cascading, catering to diverse video processing needs. It accepts video signals ranging from 480P to 1080P, supporting both progressive and interlaced scanning formats. The videos are processed, reconstructed, and merged for seamless display, theoretically supporting any number of channels that are multiples of four. The subsystems can be cascaded flexibly without specific order constraints, and they can operate independently, ensuring stable performance. Parallel processing and DDR3-SDRAM caching technology enable real-time video processing and stable display. The Intel Cyclone V FPGA controls the entire process, including input/output, scaling, splicing, and cascading. This system finds diverse practical applications across various industries, including video surveillance, gaming, meetings, and medical environments (Abstract)
Authors
- Fucheng Wang (ORCID: https://orcid.org/0000-0002-5128-9882)
- M.-T. Sun (ORCID: https://orcid.org/0000-0003-1273-0505)
- Zhenyu Yang (ORCID: https://orcid.org/0000-0003-3163-7998)
- Shuxian Shen
- Genwang Zhu
- Weichun Mei
- Zhiyang Lu
- Laili Liang
Institutions
- Jiangsu University of Technology (CN)
- East China Normal University (CN)
- Fuzhou University (CN)
Publication Details
- Published
- 2024-10-26
- DOI
- https://doi.org/10.1109/cisp-bmei64163.2024.10906189
- Primary Topic
- Image and Video Stabilization
- Type
- article
- Field-Weighted Citation Impact
- 0.00