8.2: Run-Time Power Management System by on-Die Power Sensor with Silicon Machine Learning-Based Calibration in a 3nm Octa-Core CPU
For flagship smartphones, the gaming experience has become one of essential demands, requiring high frame rate per second (fps), display quality and durability. These demands drive the evolution of the CPU to enhance performance and computing efficiency. The CPU offers multiple cores to support various computing tasks in an energy-efficient manner, relying on the scheduler [1] to allocate tasks to each core based on available power budgets. Power budgets are calculated at intervals of each computing thread. As games run at higher fps, the intervals of power budgeting become shorter. The average interval of power budgeting in two top-gaming applications is shown in Fig. 8.2.1. With fps rising to 90, the average interval is shortened to less than <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$50\mu \mathrm{S}$</tex>. Meanwhile, the CPU clock speeds increase to enhance performance for gaming, resulting in ever-higher current. Peak current grows faster than average current when high CPU performance is needed. The growing peak current causes over-current excursions to exceed the PMIC tolerance, resulting in system instability that degrades CPU performance. Therefore, a hardware-based power sensing system is essential to enable fast power/current management, for the purpose of achieving gaming performance, computing efficiency and sustained power delivery for the CPU.
Authors
- You-Ming Tsao
- Ericbill Wang
- R Liu (ORCID: https://orcid.org/0009-0007-6209-0266)
- Eric Jia-Wei Fang
- Min-Chieh Chen
- Alfred Tsai
- Bo-Jr Huang
- Chien-Yu Lu
- Yuju Cho
- Shih-Arn Hwang
- Hugh Mair
Institutions
- MediaTek (Taiwan) (TW)
Publication Details
- Published
- 2025-02-16
- DOI
- https://doi.org/10.1109/isscc49661.2025.10904564
- Citations
- 2
- Primary Topic
- Neural Networks and Applications
- Type
- article
- Field-Weighted Citation Impact
- 4.96