Extraction of Subgap Density of States in Amorphous In–Ga–Zn–O Thin-Film Transistors by Measuring Capacitor-on-Gate Structure

A new field-effect method for extracting subgap density of states (DOS) using a capacitor-on-gate structure, which requires only two transfer curves measured at room temperature, is proposed. The capacitor-on-gate structure consists of a capacitor connected to the gate node of amorphous In-Ga–Zn-O (a-IGZO) thin-film transistor (TFT). When the gate is directly swept and indirectly swept through the capacitor terminal, flat band voltage and the relationship between surface potential and gate voltage, which are crucial boundary conditions for DOS extraction, can be obtained through the I-V characteristics. The proposed method successfully obtained DOS with a profile similar to previous reports from the fabricated capacitor-on-gate structure.

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Publication Details

Journal
IEEE Transactions on Electron Devices
Published
2025-03-04
DOI
https://doi.org/10.1109/ted.2025.3545603
Primary Topic
Thin-Film Transistor Technologies
Type
article
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article

Extraction of Subgap Density of States in Amorphous In–Ga–Zn–O Thin-Film Transistors by Measuring Capacitor-on-Gate Structure

Junhyeong Park, Ji‐Hwan Park, Soobin An, Kyeong‐Soo Kang et al.
IEEE Transactions on Electron Devices
Thin-Film Transistor Technologies
article

Extraction of Subgap Density of States in Amorphous In–Ga–Zn–O Thin-Film Transistors by Measuring Capacitor-on-Gate Structure

Junhyeong Park, Ji‐Hwan Park, Soobin An, Kyeong‐Soo Kang, Soo‐Yeon Lee, Yuseong Jang, Jin Kyu Lee
article en

Abstract

A new field-effect method for extracting subgap density of states (DOS) using a capacitor-on-gate structure, which requires only two transfer curves measured at room temperature, is proposed. The capacitor-on-gate structure consists of a capacitor connected to the gate node of amorphous In-Ga–Zn-O (a-IGZO) thin-film transistor (TFT). When the gate is directly swept and indirectly swept through the capacitor terminal, flat band voltage and the relationship between surface potential and gate voltage, which are crucial boundary conditions for DOS extraction, can be obtained through the I-V characteristics. The proposed method successfully obtained DOS with a profile similar to previous reports from the fabricated capacitor-on-gate structure.

IEEE Transactions on Electron DevicesVol. 72(4)
Seoul National University (KR)
Affordable and clean energy
Openalex Percentile: Top 97%
Thin-Film Transistor Technologies
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