A High Performance Three Stage CMOS Amplifier Using Hybrid Cascode Compensation and Super Source Follower

This work presents a three-stage CMOS operational amplifier’s (Op-amp) design in 0.18-micron technology with a 1.2 V single power supply. Since high bandwidth and stability are major area of concern for an amplifier hence a frequency compensation technique has been exploited here to improve overall frequency response and meet desired design criteria. This technique is known as buffers-based hybrid cascode compensation where instead of using a single large miller capacitor, two compensation capacitors are being used. Moreover, the presented circuit uses the two super source follower (SSF) for further improvement in phase margin as the phase lag caused by the right half plane zero is controlled by putting these SSF along with the compensation capacitors. The simulated circuit exhibits DC gain as 65 dB, unity-gain bandwidth as 4 MHz, power dissipation as 360 µW and phase margin as 78°. The designed amplifier is more suitable for low power and high frequency applications.