Lowering Connectivity Requirements for Bivariate Bicycle Codes Using Morphing Circuits

In reference Bravyi et al., [Nature (London) 627, 778 (2024)NATUAS0028-083610.1038/s41586-024-07107-7], Bravyi et al. found examples of bivariate bicycle (BB) codes with similar logical performance to the surface code but with an improved encoding rate. In this work, we generalize a novel parity-check circuit design principle called morphing circuits and apply it to BB codes. We define a new family of BB codes whose parity check circuits require a qubit connectivity of degree five instead of six while maintaining their numerical performance. Logical input or output to an ancillary surface code is also possible in a biplanar layout. Finally, we develop a general framework for designing morphing circuits and present a sufficient condition for its applicability to two-block group algebra codes.

Authors

Institutions

Publication Details

Journal
Physical Review Letters
Published
2025-03-04
DOI
https://doi.org/10.1103/physrevlett.134.090602
Citations
8
Primary Topic
VLSI and FPGA Design Techniques
Type
article
Field-Weighted Citation Impact
5.84

Funders

Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Lowering Connectivity Requirements for Bivariate Bicycle Codes Using Morphing Circuits

Mackenzie H. Shaw, Barbara M. Terhal
8 citations
Physical Review Letters
VLSI and FPGA Design Techniques
5.84
article

Lowering Connectivity Requirements for Bivariate Bicycle Codes Using Morphing Circuits

Mackenzie H. Shaw, Barbara M. Terhal
article en
8 citations

Abstract

In reference Bravyi et al., [Nature (London) 627, 778 (2024)NATUAS0028-083610.1038/s41586-024-07107-7], Bravyi et al. found examples of bivariate bicycle (BB) codes with similar logical performance to the surface code but with an improved encoding rate. In this work, we generalize a novel parity-check circuit design principle called morphing circuits and apply it to BB codes. We define a new family of BB codes whose parity check circuits require a qubit connectivity of degree five instead of six while maintaining their numerical performance. Logical input or output to an ancillary surface code is also possible in a biplanar layout. Finally, we develop a general framework for designing morphing circuits and present a sufficient condition for its applicability to two-block group algebra codes.

Physical Review LettersVol. 134(9)
Delft University of Technology (NL)
European Commission, Nederlandse Organisatie voor Wetenschappelijk Onderzoek, Bentham-Moxon Trust
Affordable and clean energy
Openalex Percentile: Top 4%
VLSI and FPGA Design Techniques
5.84
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.