Cryo-CMOS High-sensitivity Capacitance Meter for Scalable Gate-based Qubit Readout
For scalable semiconductor-based quantum computer, integration of qubit, electrometer and readout circuit on CMOS platform needs to be explored. Here, for qubit readout, the use of charge-based capacitance measurement (CBCM) is proposed to detect the atto-farad change in the gate input capacitance of single-electron transistor (SET) electrometer. Mixed SET-CMOS circuit simulation revealed that a few hundred microvolts signal appeared at the integration capacitance at 1MHz data rate and the gate capacitance profile with respect to the gate voltage was successfully reproduced.
Authors
- Hiroaki Satoh (ORCID: https://orcid.org/0000-0002-5868-0219)
- Hiroshi Inokawa (ORCID: https://orcid.org/0000-0002-8647-3524)
- Alka Singh (ORCID: https://orcid.org/0000-0002-0586-5252)
Institutions
- Shizuoka University (JP)
Publication Details
- Journal
- IEEJ Transactions on Electronics Information and Systems
- Published
- 2025-02-28
- DOI
- https://doi.org/10.1541/ieejeiss.145.386
- Primary Topic
- Quantum Computing Algorithms and Architecture
- Type
- article
- Field-Weighted Citation Impact
- 0.00