A Millimeter-Wave CMOS Down-Conversion Mixer with Transformer-Based Harmonic Suppression

In this paper, we present a millimeter-wave CMOS down-conversion mixer designed for 5G cellular communications. The proposed mixer integrates a local oscillator buffer, an RF transconductance (Gm) stage, and a switching stage. A transformer-based harmonic suppression technique and separate RF Gm stage and switching stage are employed to achieve a low noise figure (NF), high conversion gain (CG), and effective harmonic suppression. Intermodulation and gain characteristics are analyzed, demonstrating enhanced harmonic suppression, high gain, and low NF. Implemented in 65 nm CMOS technology, the proposed mixer occupies a core chip area of 0.51 mm2 and consumes a dc power of 7 mW. The implemented design achieves a CG of 6.4 dB, an NF of 6.1 dB, and an output third-order intercept point of 9.0 dBm at an RF frequency of 38.2 GHz. Additionally, harmonic suppression exceeds −26 dBc, highlighting the performance advantages of the proposed architecture.

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Publication Details

Journal
Electronics
Published
2025-02-27
DOI
https://doi.org/10.3390/electronics14050943
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
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article

A Millimeter-Wave CMOS Down-Conversion Mixer with Transformer-Based Harmonic Suppression

I.‐K. Yoo, Chul Woo Byeon
Electronics
Radio Frequency Integrated Circuit Design
article

A Millimeter-Wave CMOS Down-Conversion Mixer with Transformer-Based Harmonic Suppression

I.‐K. Yoo, Chul Woo Byeon
article en

Abstract

In this paper, we present a millimeter-wave CMOS down-conversion mixer designed for 5G cellular communications. The proposed mixer integrates a local oscillator buffer, an RF transconductance (Gm) stage, and a switching stage. A transformer-based harmonic suppression technique and separate RF Gm stage and switching stage are employed to achieve a low noise figure (NF), high conversion gain (CG), and effective harmonic suppression. Intermodulation and gain characteristics are analyzed, demonstrating enhanced harmonic suppression, high gain, and low NF. Implemented in 65 nm CMOS technology, the proposed mixer occupies a core chip area of 0.51 mm2 and consumes a dc power of 7 mW. The implemented design achieves a CG of 6.4 dB, an NF of 6.1 dB, and an output third-order intercept point of 9.0 dBm at an RF frequency of 38.2 GHz. Additionally, harmonic suppression exceeds −26 dBc, highlighting the performance advantages of the proposed architecture.

ElectronicsVol. 14(5)
Dankook University (KR)
Openalex Percentile: Top 97%
Radio Frequency Integrated Circuit Design
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