Transversal cnot gate with multicycle error correction

A scalable and programmable quantum computer holds the potential to solve computationally intensive tasks that classical computers cannot accomplish within a reasonable time frame, achieving quantum advantage. However, the vulnerability of the current generation of quantum processors to errors poses a significant challenge towards executing complex and deep quantum circuits required for practical problems. Quantum error-correction codes such as stabilizer codes offer a promising path forward for fault-tolerant quantum computing; however, their realization on quantum hardware is an on-going area of research. In particular, fault-tolerant quantum processing must employ logical gates on logical qubits with error suppression with realistically large size codes. This work has implemented a transversal controlled-not (cnot) gate between two logical qubits constructed using the repetition code with flag qubits, and demonstrated error suppression with increasing code size under multiple rounds of error detection and correction. Our results conducted on IBM quantum devices through cloud access show that despite the potential for error propagation among logical qubits during the transversal cnot gate operation, scaling the code distance as we increase the number of physical qubits from 21 to 39 and 57 can suppress errors, which persists over ten rounds of error detection and correction. Our work establishes the feasibility of employing logical cnot gates alongside error detection on a superconductor-based processor using current generation quantum hardware.