Revolutionizing Multiplication: Implementing Vedic Sutra Principles in Multiplier Design

Ancient Indian Mathematics, known as Vedic Mathematics, draws from 16 principles found in ancient Indian scriptures (Vedas). Among these principles, Urdhva Tiryakbhyam, Ekanyunena Purvena, and Ekadhikena Purvena stand out for their relevance in modern computation. In recent decades, there has been significant interest in developing fast multiplier circuits, with Vedic multipliers gaining favor due to their efficiency in terms of speed, space utilization, and power consumption. This study examines the performance of these sutras, particularly in the context of $\mathbf{1 6}$-bit operations, using Verilog programming language for implementation and Vivado 2017.1 for synthesis and testing. Through simulations and analysis, the aim is to identify optimal outcomes in terms of area, speed, and power efficiency, contributing to advancements in digital signal systems and processor design.