Enhanced Low Power FinFET-Based Flash ADC Design for High-Speed Electronics Applications

In electronics applications, signals are often of very low amplitude and frequency, making them susceptible to distortion and noise, which are unavoidable issues.Over the last few decades, Complementary Metal Oxide Semiconductor (CMOS) technology has been the most widely used process technology for mobile communication devices, biomedical systems, and image processing.However, conventional CMOS comparators suffer from stacking and driving current limitations, and face significant second-order effects below the 45 nm process node.In this paper, we present the circuits of Flash analog-to-digital converters (ADCs) specifically designed for mobile and biomedical applications.Flash ADCs are ideal for high-speed and wide-bandwidth applications, where comparators and encoders are crucial components of the ADC architecture.The main objective of this work is to design low-power, enhanced current-driving circuits for Flash ADCs.This is achieved by designing a FinFET-based comparator, encoder, and supporting circuits for ADCs in a 32 nm process.Our investigation shows that performance degrades at higher speeds below 32 nm, but our modified double-tail comparator and encoder unit effectively reduce power consumption while improving current-driving capabilities.This work builds upon previous research conducted at the 180 nm CMOS process level.For implementation, we investigated Taiwan Semiconductor models for CMOS and FinFET at 45 nm, 32 nm, and 14 nm using Synopsys HSPICE.