Design of an FPGA-based emulator for rapidly prototyping a nonvolatile system-on-a-chip
Abstract This paper presents a field-programmable gate array (FPGA)-based emulator for rapidly prototyping a non-volatile (NV)-FPGA-based system on chip (SoC) where an FPGA, a central processing unit, and other peripheral modules are integrated into a single chip to address the difficulty in estimating the usefulness of an NV-FPGA-based SoC on a target system. By mimicking the NV-memory device as a sequential logic circuit, a virtual NV-FPGA SoC is implemented on a commercial FPGA board, and its system-level functional verification is performed. As a typical design example, the proposed hardware is implemented on a Digilent Basys 3 board. A fundamental arithmetic logic circuit is implemented on the NV-FPGA, and its logical behavior is the same as that of the original circuit, and NV-logic-specific functions, i.e. store and recall operations are successfully confirmed. Additionally, a 96.3% power reduction is estimated by the NV-FPGA SoC compared to that of a volatile FPGA SoC system under 1.83% of activity ratio.
Authors
- Daisuke Suzuki (ORCID: https://orcid.org/0000-0002-8329-5734)
- Takahiro Hanyu (ORCID: https://orcid.org/0000-0002-4397-8290)
Institutions
- University of Aizu (JP)
- Tohoku University (JP)
Publication Details
- Journal
- Japanese Journal of Applied Physics
- Published
- 2025-02-26
- DOI
- https://doi.org/10.35848/1347-4065/adba6d
- Citations
- 1
- Primary Topic
- Real-time simulation and control systems
- Type
- article
- Field-Weighted Citation Impact
- 1.21