HEDWIG: Homomorphic Encryption Accelerator Design Using BFV-HPS With HiGh-Speed Fixed-Point Approximation

Homomorphic encryption enables computations on the ciphertext to preserve data privacy with significant computational overhead compared to plaintext computations. In response to this challenge, we present HEDWIG, a novel end-to-end hardware acceleration system designed to enhance the efficiency of homomorphic encryption, specifically tailored for the latest BFV-HPS scheme. To the best of our knowledge, this is the first hardware accelerator for the BFV-HPS scheme variant. Key contributions include computation workload reduction via approximation, hardware resource optimization on modular computation modules, and computation workflow optimization to improve HE algorithm efficiency. The proposed HEDWIG is employed to perform homomorphic evaluations over machine learning model inference with a high reduction in DSP usage compared to prior BFV RNS variants FPGA accelerator with clock frequency reached 300MHz.

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Publication Details

Published
2025-02-26
DOI
https://doi.org/10.1145/3706628.3708853
Citations
1
Primary Topic
Chaos-based Image/Signal Encryption
Type
article
Field-Weighted Citation Impact
1.28
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HEDWIG: Homomorphic Encryption Accelerator Design Using BFV-HPS With HiGh-Speed Fixed-Point Approximation

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article

HEDWIG: Homomorphic Encryption Accelerator Design Using BFV-HPS With HiGh-Speed Fixed-Point Approximation

Weihang Tan, Keshab K. Parhi, Antian Wang, Zhenyu Xu, Caiwen Ding, Tao Wei, Yingjie Lao
article en
1 citations

Abstract

Homomorphic encryption enables computations on the ciphertext to preserve data privacy with significant computational overhead compared to plaintext computations. In response to this challenge, we present HEDWIG, a novel end-to-end hardware acceleration system designed to enhance the efficiency of homomorphic encryption, specifically tailored for the latest BFV-HPS scheme. To the best of our knowledge, this is the first hardware accelerator for the BFV-HPS scheme variant. Key contributions include computation workload reduction via approximation, hardware resource optimization on modular computation modules, and computation workflow optimization to improve HE algorithm efficiency. The proposed HEDWIG is employed to perform homomorphic evaluations over machine learning model inference with a high reduction in DSP usage compared to prior BFV RNS variants FPGA accelerator with clock frequency reached 300MHz.

Tufts University (US), University of Minnesota (US), Purdue University Fort Wayne (US), Clemson University (US)
Affordable and clean energy
Openalex Percentile: Top 23%
Chaos-based Image/Signal Encryption
1.28
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