FPGA Implementation of 8th Order ECG Filter Design with Optimizing Performance Truncated Multipliers

The purpose of the research is to develop and execute the finite and infinite impulse response digital filters based on the field programmable gate arrays with the aid of the Xilinx ISE design software application package. Often, low pass digital filters are implemented for various medical applications for quick issue detection and prediction. In particular, accurate heart rate predictions are obtained through the real-time processing of ECG signals and thus these filters have to be of high efficiency, low logic size parameters and low power consumption. This work aims to present a comparison and some analysis of FIR and IIR filters. To reduce logic size, a truncated multiplier is applied and its performance is evaluated against conventional methods. For signal accuracy, the FIR filter is designed using the Rectangular Window method where the IIR filter is designed using the Direct Form II Chebyshev Type II method both utilizing an eighth order design. The implementation is carried out using Xilinx ISE Design Suite. The performance is measured by the difference between the ECG signal in simulation and the actual measured signal. The utilization of FPGA with digital filters in this research presents numerous merits.