WIP: Towards a Georgia Tech Semiconductor Experience for Underclassmen

This work in progress innovative practice paper describes the plans of a semiconductor experience tailored to underclassmen engineering students. The Georgia Tech Semi-conductor Experience (GTSE) is an upcoming program that is to provide a first-year experience that inspires pursuit of a career in semiconductor technology. Initially acting as a project that may be chosen and completed during a freshmen electrical and computer engineering course, GTSE will provide an opportunity for underclassmen to acquire a glimpse into the fabrication, modeling, and visualization of semiconductor-related devices. Fabrication consists of processes needed to fabricate a silicon solar cell. The fabrication process has been developed to maximize student safety, maximize student throughput each semester, and minimize the processing complexity. Processes requiring experience will be done under the guidance of a teacher assistant or instructor. After fabrication, the solar cells will be tested to determine their I/V characteristics and efficiency. The data can then be used to help students understand the complexity that a non-ideal world can introduce in a relatively simple device. The outcome of the semiconductor fabrication process is simulated using Silvaco Athena, and modeling of the solar cell device's electrical and physical properties is accomplished using Synopsys TCAD. Visualization of semiconductor device operation and atomic-level charge carrier operation is realized using custom software packages. To aid in the advancement of GTSE, under-classmen were asked to participate in guided research, modeling, or equipment setup and programming. Discussions about various aspects of silicon solar cell fabrication planning and modeling gave some qualitative insight into how well students will engage in the knowledge laid out for them. At the end of GTSE, students will have learned about various classical and quantum mechanics of the solar cell and understand the fabrication decisions. The main goal is to introduce basic skills and learning opportunities to spark interest in many semiconductor careers, especially since there is currently an industry demand for a semiconductor workforce in the United States.

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Publication Details

Published
2024-10-13
DOI
https://doi.org/10.1109/fie61694.2024.10892859
Primary Topic
Experimental Learning in Engineering
Type
article
Field-Weighted Citation Impact
0.00

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article

WIP: Towards a Georgia Tech Semiconductor Experience for Underclassmen

A. Bruno Frazier, A. Rohatgi, Azad Naeemi, William L. Schaffer
Experimental Learning in Engineering
article

WIP: Towards a Georgia Tech Semiconductor Experience for Underclassmen

A. Bruno Frazier, A. Rohatgi, Azad Naeemi, William L. Schaffer
article en

Abstract

This work in progress innovative practice paper describes the plans of a semiconductor experience tailored to underclassmen engineering students. The Georgia Tech Semi-conductor Experience (GTSE) is an upcoming program that is to provide a first-year experience that inspires pursuit of a career in semiconductor technology. Initially acting as a project that may be chosen and completed during a freshmen electrical and computer engineering course, GTSE will provide an opportunity for underclassmen to acquire a glimpse into the fabrication, modeling, and visualization of semiconductor-related devices. Fabrication consists of processes needed to fabricate a silicon solar cell. The fabrication process has been developed to maximize student safety, maximize student throughput each semester, and minimize the processing complexity. Processes requiring experience will be done under the guidance of a teacher assistant or instructor. After fabrication, the solar cells will be tested to determine their I/V characteristics and efficiency. The data can then be used to help students understand the complexity that a non-ideal world can introduce in a relatively simple device. The outcome of the semiconductor fabrication process is simulated using Silvaco Athena, and modeling of the solar cell device's electrical and physical properties is accomplished using Synopsys TCAD. Visualization of semiconductor device operation and atomic-level charge carrier operation is realized using custom software packages. To aid in the advancement of GTSE, under-classmen were asked to participate in guided research, modeling, or equipment setup and programming. Discussions about various aspects of silicon solar cell fabrication planning and modeling gave some qualitative insight into how well students will engage in the knowledge laid out for them. At the end of GTSE, students will have learned about various classical and quantum mechanics of the solar cell and understand the fabrication decisions. The main goal is to introduce basic skills and learning opportunities to spark interest in many semiconductor careers, especially since there is currently an industry demand for a semiconductor workforce in the United States.

Georgia Institute of Technology (US)
Intel Corporation
Openalex Percentile: Top 60%
Experimental Learning in Engineering
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