A Path-Based Topology-Agnostic Fault Diagnosis Strategy for Multiprocessor Systems

Fault diagnosis technology is a method for locating faulty processors in multiprocessor systems, and it plays a crucial role in ensuring system stability, security and reliability. A widely used approach in this technology is the system-level strategy, which determines processor status by interpreting the set of test results between adjacent processors. Among them, the <i>PMC</i> and <i>MM</i> models are two commonly employed methods for generating these results. The diversity and complexity of network topologies in systems constrain existing algorithms to specific topologies, while the limitations of fault diagnosis strategies lead to reduced fault tolerance. In this paper, we present a novel path-based method to tackle the fault diagnosis problems in various networks according to the PMC and MM models. Firstly, we introduce the algorithm for partitioning the path into subpaths based on these models. To ensure that at least one subpath is diagnosed as fault-free, we derive the relationship between the fault bound <inline-formula><tex-math notation="LaTeX">$T$</tex-math></inline-formula> and the path length <inline-formula><tex-math notation="LaTeX">$N$</tex-math></inline-formula>. Then, building on methods for recognizing the subpath states, we have developed fault diagnosis algorithms for both the PMC and MM models. The simulation results show that our proposed algorithms can quickly and accurately diagnose faults in multiprocessor systems.

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Publication Details

Journal
IEEE Transactions on Computers
Published
2025-02-26
DOI
https://doi.org/10.1109/tc.2025.3543701
Citations
1
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
2.27
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article

A Path-Based Topology-Agnostic Fault Diagnosis Strategy for Multiprocessor Systems

Jiong Wu, Hao Feng, Lin Chen
1 citations
IEEE Transactions on Computers
VLSI and Analog Circuit Testing
2.27
article

A Path-Based Topology-Agnostic Fault Diagnosis Strategy for Multiprocessor Systems

Jiong Wu, Hao Feng, Lin Chen
article en
1 citations

Abstract

Fault diagnosis technology is a method for locating faulty processors in multiprocessor systems, and it plays a crucial role in ensuring system stability, security and reliability. A widely used approach in this technology is the system-level strategy, which determines processor status by interpreting the set of test results between adjacent processors. Among them, the <i>PMC</i> and <i>MM</i> models are two commonly employed methods for generating these results. The diversity and complexity of network topologies in systems constrain existing algorithms to specific topologies, while the limitations of fault diagnosis strategies lead to reduced fault tolerance. In this paper, we present a novel path-based method to tackle the fault diagnosis problems in various networks according to the PMC and MM models. Firstly, we introduce the algorithm for partitioning the path into subpaths based on these models. To ensure that at least one subpath is diagnosed as fault-free, we derive the relationship between the fault bound <inline-formula><tex-math notation="LaTeX">$T$</tex-math></inline-formula> and the path length <inline-formula><tex-math notation="LaTeX">$N$</tex-math></inline-formula>. Then, building on methods for recognizing the subpath states, we have developed fault diagnosis algorithms for both the PMC and MM models. The simulation results show that our proposed algorithms can quickly and accurately diagnose faults in multiprocessor systems.

IEEE Transactions on ComputersVol. 74(6)
Hainan University (CN)
Openalex Percentile: Top 18%
VLSI and Analog Circuit Testing
2.27
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