Optimisation and validation of power delivery networks for multi-gigabit data links

Abstract The performance of ASICs for high-bandwidth communications is heavily influenced by the interconnection with the hosting module and paired devices, including the bonding scheme and the PCB layout. The recent validation campaign of the 25.6 Gbps DART28 transmitter has highlighted that a coordinated simulation and design of the power delivery network is required to achieve satisfactory performance. In this context, the results obtained from variants of the test-bench carrier boards are compared, examining how the optimisation of the layout and bondwire placement leads to improvements of the serial link characteristics. Electromagnetic simulations support the analysis and provide a framework for developing the subsequent versions.