Experimental validation of a virtual synchronous machine grid-forming converter control concept

The growing integration of renewable energy sources into the European power grid, along with the increased use of power electronics-interfaced devices, necessitates the development of advanced control strategies. Grid-forming control approaches have emerged as promising solutions to meet the future demands of the power system. To ensure these control methods adhere to network code requirements, rigorous validation is essential. This study provides an experimental validation of a discrete-time implementation of a virtual synchronous machine (VSM) converter control method, alongside a virtual impedance for current limitation, using a hardware-in-the-loop (HIL) test bench. A detailed analysis of the virtual impedance’s behavior during fault-ride-through events revealed limitations in subtransient current control. These limitations were attributed to the control system’s low bandwidth in discrete-time operation. To address this, the control system was enhanced with a current saturation mechanism and a fault mode employing gain scheduling, leading to improved system stability and better subtransient current limitation. The findings emphasize the importance of experimental validation in discrete-time systems to resolve transient behavior challenges and improve control system performance.