Estimation of Positive‐, Negative‐, and Zero‐Sequence Current and Voltage Phasors of <scp>UIPC VSCs</scp> for Short‐Circuit Faults in Transmission Lines

ABSTRACT FACTS devices, functioning as controlled series voltage and parallel current source converters in transmission lines, can enhance network flexibility. The currents and voltages are regarded as unknown variables in the impedance estimation equations of the distance relay during fault occurrence. Typically, addressing the issues of protection systems for lines integrated with FACTS devices necessitates the development of a novel protection algorithm informed by the current line topology. A novel approach to address this difficulty involves employing an algorithm to estimate the injected current and voltage parameters of the series and parallel converters in FACTS devices. This research presents an estimation scheme utilizing artificial neural networks to determine the magnitude and phase angle of voltage and current in voltage source converters of the UIPC during short‐circuit faults in transmission lines. The proposed approach has been designed for use across diverse locations, phases, resistances, and fault durations on both sides of the UIPC. The voltage and current magnitudes and angles for all three bus sequences on one side of the line, along with the voltage magnitude and angle of the equivalent circuit of the series converters and the current magnitude and angle of the shunt converter, have been recorded. The primary aim of this work is to introduce an estimation model derived from the measurement data of the bus and the UIPC converters. Ultimately, by employing the estimated phasors, the impedance and, consequently, the distance from the fault location to the relay may be accurately determined, eliminating the necessity to alter the configuration and formulation of the distance relay. The approach has undergone testing and evaluation for various short circuit scenarios on both sides of the UIPC under diverse conditions. The successful outcomes demonstrated in the simulation section indicate that the proposed technique effectively estimates the UIPC phasor during a fault.