Short-Circuit Characteristic Analysis of SiC Trench MOSFETs with Dual Integrated Schottky Barrier Diodes

A 4H-silicon carbide (SiC) trench gate metal–oxide–semiconductor field-effect transistor (MOSFET) with dual integrated Schottky barrier diodes (SBDs) was characterized using numerical simulations. The advantage of three-dimensional stacked integration is that it allows the proposed structure to obtain an electric field of below 0.6 MV/cm in the gate oxide and SBD contacts and achieve ~10% lower forward voltage of SBDs than the planar gate SBD-integrated MOSFET (PSI-MOS) and the trench gate structure with three p-type-protecting layers (TPL-MOS). The dual-SBD-integrated MOSFET (DSI-MOS) also highlights the better influences of the more than 70% reduction in the miller charge, as well as the over 50% reduction in switching loss compared to the others. Furthermore, the short-circuit (SC) robustness of the three devices was identified. The DSI-MOS attains the critical energy and the aluminum melting point in a longer SC time interval than the TPL-MOS. The p-shield layers in the DSI-MOS are demonstrated to yield the huge benefit of improving the reliability of the contacts when SC reliability is considered.