A Deadlock-Free Deterministic–Adaptive Hybrid Routing Algorithm for Efficient Network-on-Chip Communication

In the era of multi-core technology, efficient communication among numerous IP cores has become a critical challenge. Network-on-chip (NoC) technology provides a scalable and effective solution, attracting significant attention in academia and industry. This paper introduces a novel deterministic–adaptive hybrid routing (DAHR) algorithm designed to enhance performance while ensuring deadlock-free operation. The DAHR algorithm leverages pre-fetched deterministic information and real-time congestion feedback from neighboring nodes to make dynamic routing decisions. Before packet injection, the source–destination positional relationship and required hops are pre-calculated and encoded into the packet’s head flit. Routing decisions are then based on the availability of free virtual channels in the determined directions, eliminating the need for a complex routing calculation unit. Simulation results demonstrate that DAHR reduces average packet delay by at least 5.8% and improves saturation throughput by at least 9.0% compared to conventional routing schemes without introducing additional hardware overhead.