Compensation of lens aberration induced overlay by computational metrology

In recent years, the overlay budget requirements have tightened significantly across various lithographic technologies. Both DUV multiple patterning and EUV lithography introduce unique alignment errors due to pattern shift. Traditionally, most overlay improvements have been achieved by hardware advancements. However, predicting on-device overlay using aberration fingerprints can provide valuable insights, as the projection optics module plays a key factor in determining the distortion of the overlay, in terms of pattern placement error control in lithography systems. In this paper, we demonstrate how computationally calculated overlay of the device pattern, using lens aberration fingerprints as an additional input, can be utilized to predict pattern shift and effects such as non-zero offset/overlay. This offset is a critical parameter in the field of semiconductor lithography, representing the residual misalignment between different layers of a semiconductor device after various processing steps. Non-zero offset acknowledges and quantifies the inevitable deviations that occur during manufacturing: such deviations can arise from multiple sources, including tool inaccuracies, process variations, and metrology. It is measured as the difference between on-target overlay after lithography vs. on-device measurement after etching. For enhanced process control required for the latest nodes, the objective is to characterize the non-zero offset, minimize its magnitude and variability, and identify potential excursions across tool fleet, layers, slit position and exposure conditions. This work focuses on characterizing non-zero offset through data collection and computational lithography. With the availability of wafer-fine aberration data, automating this process is feasible and detailed in this paper. Integrating such measurement into the overlay control loop allows for quantifying its benefits.