DRAM capacitor-to-capacitor short process characterization via large field of view SEM metrology analysis

Capacitor-to-capacitor shorts pose a significant challenge in advanced DRAM manufacturing, particularly as scaling to higher aspect ratios and smaller critical dimensions (CDs) continues. This study employs a high-resolution, high-throughput, large field of view (FOV) scanning electron microscopy (SEM) metrology system to investigate capacitor-to- capacitor shorts after storage node (SN) oxide etch at feature level. Key metrology parameters, such as hole critical dimension (CD), placement error (PE) and hole-to-hole spacing are analyzed. Results demonstrate the small hole-to-hole spacing is the primary cause of these shorts, which is mainly contributed by the large hole CD. Further investigation of prior SN hard mask (HM) etch step reveals that certain defect signatures are transferred from this etch step, while others originate during the oxide etch step. These findings underscore the importance of large FOV SEM metrology for accurate process characterization and optimization, providing critical insights for accelerating yield discovery in advanced DRAM nodes.