Towards zero defects: machine learning-driven solder bump reliability in semiconductor packaging
Solder bumps are critical interconnects in advanced semiconductor packaging, ensuring device performance and reliability. However, as packaging scales down, solder bumps become more prone to mechanical and thermal stresses, leading to performance degradation and yield loss. Conventional inspection techniques are often characterized by their time-consuming nature, as they primarily focus on detecting defects after the fabrication process has been completed. This post-fabrication approach delays anomaly detection limits real-time corrective actions and often results in increased costs, reduced efficiency, and quality compromises due to the need for rework or scrapping of defective components. This paper proposes an automated framework leveraging real-time data collection and machine learning to predict and mitigate solder bump failures during fabrication. By classifying bumps into functional and non-functional categories, the system enables targeted process adjustments. This proactive approach enhances yield, minimizing defects during advanced semiconductor packaging manufacturing.
Authors
- Shajib Ghosh (ORCID: https://orcid.org/0000-0003-3523-8177)
- Nitin Varshney
- Liton Kumar Biswas (ORCID: https://orcid.org/0000-0002-3260-5915)
- Navid Asadizanjani (ORCID: https://orcid.org/0000-0002-7097-4463)
- Himanandhan Reddy Kottur
Publication Details
- Published
- 2025-02-21
- DOI
- https://doi.org/10.1117/12.3060363
- Citations
- 1
- Primary Topic
- Integrated Circuits and Semiconductor Failure Analysis
- Type
- article
- Field-Weighted Citation Impact
- 0.73