Photolithography process optimization: insights into negative tone resists and spray coating
The semiconductor industry continually drives new developments in photolithography to enhance microfabrication precision and efficiency. The lift-off process, crucial for creating precise patterns on substrates, relies heavily on negative tone photoresists due to their robustness and ability to form durable patterns. Unlike positive tone photoresists, negative tone resists become insoluble upon exposure to light, allowing selective removal of unexposed areas. A significant challenge in using negative tone resists for lift-off is achieving uniform edge coverage over topographies while maintaining surface smoothness. Edge coverage ensures that deposited materials adhere only to desired areas, avoiding residues that could impair device performance. Surface smoothness is vital for maintaining pattern integrity and high-resolution features. Spray coating offers advantages over spin coating, particularly for wafers with topography. Key parameters such as dispense rate, gas flow, and chuck temperature significantly influence coating quality. Spray coating allows for better control of the resist thickness and coverage, especially on edges and corners. The process consists of spraying a fine mist of photoresist onto the wafer, which is further baked to remove solvents. The parameters of the spray coating process, such as nozzle type, gas flow, and chuck temperature, must be carefully optimized to achieve the desired results. This research focuses on three negative photoresists: AR-N 2210, AZ nLOF 2070, and AZ LNR003. Using Si wafers with 100 μm deep, KOH-etched cavities, the study systematically varies process parameters to identify optimal conditions for enhanced edge coverage and surface quality. Optimal exposure doses were determined through sector exposure tests on spray coated wafers, showing significant improvements in pattern quality. Analysis using optical microscopy and SEM revealed the influence of parameters on layer quality and structure resolution. The findings provide valuable insights into photolithography process optimization, contributing to more efficient and reliable semiconductor manufacturing techniques. Improved edge coverage and surface smoothness enhance microelectronic device performance and yield, meeting industry demands for smaller, faster, and more reliable components.
Authors
- Johanna Rimböck (ORCID: https://orcid.org/0000-0002-0603-2279)
- Jakob Holzapfel
- Martin Weinhart
- Markus Brunnbauer
- A. Schreiner
- Monica E. Reum
Publication Details
- Published
- 2025-02-21
- DOI
- https://doi.org/10.1117/12.3051472
- Primary Topic
- Copper Interconnects and Reliability
- Type
- article
- Field-Weighted Citation Impact
- 0.00