Beamspace Equalization with Internal Spatially Diverse Test Targets

Modern radar systems consist of antenna frontend electronics and backend processing computers. Typically, the antenna frontend contains high-speed ASIC and FPGA processing for first-level signal conditioning on an element-by-element basis, including element-level linear equalization. Element-level linear equalization is the application of a finite impulse response (FIR) filter to each element for the purpose of channel-matching all elements to a desired impulse response. We propose an equalization technique that reduces frontend FPGA resources and alleviates processing bottlenecks. The technique eliminates frontend linear equalization weight application and performs equalization processing in the backend. Equalization is performed on beamformed beams, rather than at element-level, and utilizes internal waveform generators to generate beams at different azimuth and elevation angles per pulse repetition interval.