Embedded RDMA Lite for FPGA Interconnect in Active Electronically Scanned Array RADAR

With new advances in Field Programmable Gate Array (FPGA) technology, such as the Agilex™ 9 Direct RFSeries FPGA, which combines high speed data converters with a large FPGA device, distributed capture and processing of radar data may become more common. For some radar algorithms transfer of data between the distributed FPGA devices may be necessary. Here we describe the implementation of our Embedded RDMA Lite core design that allows DSP designs on an FPGA to read and write data across a network as easily as using a local DMA operation. We describe how network data transfers may be necessary in a distributed Space Time Adaptive Processing (STAP) application and show an example design that uses the Embedded RDMA Lite core to transfer part of a radar data cube for STAP processing.