A Ka-Band Doherty Power Amplifier Employing an Analog Linearizer in 65-nm CMOS

This paper presents a $\mathrm{2 4 - 3 0} \mathrm{~ G H z}$ energy-efficient series-combined Doherty power amplifier (DPA) employing a diode-connected analog predistortion (APD) linearizer based on an envelope detector (ED). The ED-based APD provides extra freedom to achieve a broadband gain expansion characteristic while evading inherent phase distortion. The proposed DPA achieves a simulated saturated output power (Psat) of 20-21.8 dBm and saturated power added efficiency (PAE) of 21-34.7% across the operating band, while at 6-dB PBO, the PAE and Pout are $\mathrm{1 8 - 2 0. 5 \%}$ and $\gt14 \mathrm{dBm}$, respectively. Finally, the DPA module exhibits excellent linearity with a maximum of $\pm 1.6 \mathrm{~dB}$ AM-AM and 6.7° AM-PM distortions across the band.