A Broadband High-Efficiency Power Amplifier Based on Harmonic Control
This paper presents a high-efficiency broadband power amplifier chip based on the $0.15 \mu \mathrm{~m}$ GaAs pHEMT process. The chip adopts a three-stage cascade topology amplification structure to improve the power gain of the amplifier. Added stable network design in input and inter stage matching to improve stability. The final stage uses a four-cell power synthesis output and a harmonic control matching network to achieve high output power and power additional efficiency. In the frequency range of $10-20 \mathrm{GHz}$, the output power is 35.6 dBm, the small signal gain is greater than 25 dB, and the power added efficiency is $\mathbf{3 3. 8 \%}$.
Authors
- Shuangde Li (ORCID: https://orcid.org/0000-0002-4379-0677)
- Yuxiang Yan
- Shihao Wang (ORCID: https://orcid.org/0000-0003-2645-2075)
- Chenchen Jiang (ORCID: https://orcid.org/0000-0002-6118-9594)
- Yuanjian Liu (ORCID: https://orcid.org/0000-0002-1090-5749)
Institutions
- Nanjing University of Posts and Telecommunications (CN)
Publication Details
- Published
- 2024-09-22
- DOI
- https://doi.org/10.1109/apcap62011.2024.10881669
- Primary Topic
- Advanced Power Amplifier Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China
- Nanjing University of Posts and Telecommunications