Development of Self‐Aligned Top‐Gate Transistor Arrays on Wafer‐Scale Two‐Dimensional Semiconductor

Two-dimensional semiconductor materials (2DSM) effectively mitigate the short-channel effect due to their atomic thickness, offering significant advantages over traditional silicon-based materials, particularly in short channel length. In manufacturing 2DSM top-gate field-effect transistors (TG-FETs), simultaneous miniaturization of the gate and channel can only be achieved through a self-alignment process, enabling high-density integration of short-channel FETs. However, current self-aligned FETs based on 2DSM face challenges in attaining wafer-scale integration due to manufacturing process limitations. This work has successfully developed high-performance and wafer-scale TG-FET arrays using a self-aligned method that integrates the processes of dry etching, wet selective etching, and post-device optimization. The miniaturization is demonstrated by fabricating TG-FETs with a channel length of 200 nm, achieving an impressive on-state current density of 465.5 µA µm<sup>-1</sup> and a high on-off current ratio of 10<sup>8</sup>. Furthermore, we constructed the inverters and logic modules based on self-aligned FETs, showcasing the process's compatibility for future integration.

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Publication Details

Journal
Advanced Science
Published
2025-02-20
DOI
https://doi.org/10.1002/advs.202415250
Citations
2
Primary Topic
2D Materials and Applications
Type
article
Field-Weighted Citation Impact
1.04

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article

Development of Self‐Aligned Top‐Gate Transistor Arrays on Wafer‐Scale Two‐Dimensional Semiconductor

Chunxiao Cong, Sen Wang, Sheng Dai, Xiaofei Yue et al.
2 citations
Advanced Science
2D Materials and Applications
1.04
article

Development of Self‐Aligned Top‐Gate Transistor Arrays on Wafer‐Scale Two‐Dimensional Semiconductor

Chunxiao Cong, Sen Wang, Sheng Dai, Xiaofei Yue, Jinshu Zhang, Haibing Qiu, Xinliu He, Zhejia Zhang, Yu‐Fei Song, Zihan Xu, Haojie Chen, Xiangqi Dong, Xiaojun Tan, Wenzhong Bao, Lihui Zhou, Hui Xie, Saifei Gou, Mingrui Ao, Xia Yin, Yin Wang, Yuchen Tian, Yuxuan Zhu, Yan Hu, Jing Wan, Qicheng Sun, Jieya Shang, Jiahao Wang
article en
2 citations

Abstract

Two-dimensional semiconductor materials (2DSM) effectively mitigate the short-channel effect due to their atomic thickness, offering significant advantages over traditional silicon-based materials, particularly in short channel length. In manufacturing 2DSM top-gate field-effect transistors (TG-FETs), simultaneous miniaturization of the gate and channel can only be achieved through a self-alignment process, enabling high-density integration of short-channel FETs. However, current self-aligned FETs based on 2DSM face challenges in attaining wafer-scale integration due to manufacturing process limitations. This work has successfully developed high-performance and wafer-scale TG-FET arrays using a self-aligned method that integrates the processes of dry etching, wet selective etching, and post-device optimization. The miniaturization is demonstrated by fabricating TG-FETs with a channel length of 200 nm, achieving an impressive on-state current density of 465.5 µA µm<sup>-1</sup> and a high on-off current ratio of 10<sup>8</sup>. Furthermore, we constructed the inverters and logic modules based on self-aligned FETs, showcasing the process's compatibility for future integration.

Advanced ScienceVol. 12(15)
North University of China (CN), East China University of Science and Technology (CN), Fudan University (CN), Shanghai Fudan Microelectronics (China) (CN)
National Natural Science Foundation of China, Fudan University, Shanghai Municipal Education Commission, Science and Technology Commission of Shanghai Municipality, National Key Research and Development Program of China
Openalex Percentile: Top 28%
2D Materials and Applications
1.04
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