The Design and Implementation of Low Latency, High Speed Telemetry System

In order to transmit as much effective location information as possible in real time, a low-latency, high-speed telemetry system is proposed, which realizes the high-speed transmission of effective location information on a self-developed general hardware platform based on the FPGA modular design method. The high-speed telemetry system model is established, and the processing delay of the system is designed and analyzed from the aspects of transmission link and inter-board transmission, and the processing delay of the system is simulated and tested according to this model, and the processing delay is 3us∼5us, and the theoretical results are consistent with the measured results. In order to reduce the processing delay, the inter-board transmission adopts a custom high-speed Rocket IO interface transmission protocol, and the transmission link adopts an ultra-short frame data structure and a channel coding with small delay, which can transmit 3∼4 effective position information within more than ten microseconds.