Testing the Susceptibility of a High-Speed Integrated Circuit
High-speed integrated circuits (ICs) can be very sensitive to electromagnetic interference.If the response of the circuit to electromagnetic interference can be quantified and understood, the circuit -or the system it goes in to -can be made more robust and reliable.The following paper outlines the development of hardware to allow testing of an SRAM module against electromagnetic noise.The ultimate goal of the work is to develop models which predict the susceptibility of digital ICs.
Authors
- Daryl G. Beetner (ORCID: https://orcid.org/0000-0002-3149-4133)
- M. Gualdoni
- Ludovic V. Grivault
Institutions
- Research Institute for Electromagnetic Materials (JP)
Publication Details
- Published
- 2025-02-18
- DOI
- https://doi.org/10.18260/1-2-1153-51427
- Primary Topic
- Integrated Circuits and Semiconductor Failure Analysis
- Type
- article
- Field-Weighted Citation Impact
- 0.00